GHDL — VHDL Simulator

A compiler and simulator for VHDL — it translates the hardware description into machine code and runs it, which makes simulation substantially faster than interpreted simulators. It supports VHDL-87 through 2008, writes VCD and GHW files that open in GTKWave, and integrates with Yosys for FPGA synthesis. Until now the directory held only Verilog tools; this is the other half of the equation, and it matters particularly in Europe and in academic courses where VHDL is the teaching language.