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Electric VLSI — The Complete Guide: Open-Source Chip Layout and Schematic Design

Electric VLSI — The Complete Guide: Open-Source Chip Layout and Schematic Design

Electric is an open-source system for designing integrated circuits: layout of transistors and layers, schematics, and cross-checking between them. It is written in Java, developed by Static Free Software, and has been used for many years in university VLSI courses.

What you get

What to know

Electric uses a connectivity-based approach: the layout keeps the connections between components even as you move them. That differs from commercial tools and takes time to get used to. Development has been fairly slow in recent years, but the program is stable and well documented. It suits learning and research, not as a replacement for industrial tools on advanced processes.

Related tools

To simulate the netlist — ngspice. To synthesise logic from Verilog — Yosys. To simulate digital blocks — Icarus Verilog.

The bottom line

Electric is a free way to learn chip design end to end — from schematic to checked layout — without an expensive licence.

Further reading

מדריכי AI למהנדסים ולמשרד, ב-5 שפות: adit-ai.com ←