KLayout — The Complete Guide: Free Viewing and Editing of GDS and OASIS Chip Layouts
KLayout is a program for viewing and editing integrated-circuit layouts in the formats used across the semiconductor industry. It opens very large files quickly and has become a core tool in open-source chip design flows.
KLayout
Matthias Köfferlein
Viewer and editor for chip mask layouts (GDS2, OASIS) — fast even on huge files, with DRC, LVS and scripting.
Get it from the vendorWhat you get
- Many formats — GDS2, OASIS, DXF, CIF, Gerber and LEF/DEF.
- Version comparison — XOR between two layouts to find differences.
- Editing — boolean operations, parametrised cells and full undo.
- DRC and LVS — design-rule and layout-versus-schematic checks through scripts.
- Scripting IDE — Ruby and Python for automatic layout generation.
Who it suits
Chip designers and students working with open process design kits, and anyone who just needs to open a huge GDS file and check it. PCB engineers also use it to inspect Gerber files. It is licensed under GPL-3.0, commercial work included, and runs on Windows, macOS and Linux.
Related tools
For a layout editor that checks design rules while you draw — Magic VLSI. For analog schematics — Xschem. For automated physical implementation of a digital chip — OpenROAD.
Magic VLSI
Tim Edwards (Open Circuit Design)
A veteran chip layout editor with real-time design-rule checking, parasitic extraction and GDS and LEF/DEF support.
Get it from the vendor
Xschem
Stefan Schippers
Hierarchical schematic capture for analog and mixed-signal circuits, with SPICE, Verilog and VHDL netlist output.
Get it from the vendor
OpenROAD
The OpenROAD Project
An automated RTL-to-GDSII flow for digital chips — floorplanning, placement, clock tree, routing and timing analysis.
Get it from the vendor
Gerbv
gEDA / Gerbv developers
Viewer for Gerber RS-274X, Excellon drill and pick-and-place files — a last check before sending a board to the fab.
Get it from the vendorThe bottom line
KLayout is the first open tool to reach for when you have a chip layout file — fast, precise and scriptable, at no cost.